ΑΝΑΚΟΙΝΩΣΗ
Στο πλαίσιο επισκέψεων του προγράμματος Erasmus+ στο ΤΗΜΜΥ o
Dr. Daniele Rossi,
Associate Professor in Electronics, Dept. of Information Engineering,
University of Pisa, Italy
θα δώσει διάλεξη με θέμα:
“Hardware Design for Trustworthy Systems: Security, Reliability, and Emerging Architectures”
H εκδήλωση θα πραγματοποιηθεί στην αίθουσα 8, Ηλεκτρολόγων Μηχανικών τη Δευτέρα 7 Σεπτεμβρίου 2026, στις 12:00.
Η διάλεξη θα δοθεί στα Αγγλικά.
ABSTRACT
Modern embedded and cyber-physical systems increasingly rely on heterogeneous computing architectures, pervasive connectivity, and resource-constrained hardware platforms. This evolution introduces new challenges in terms of security, reliability, and trustworthiness, requiring design approaches that span multiple layers of the system stack, from physical interfaces and hardware primitives to communication networks and processor architectures.
This seminar will present a selection of recent research activities addressing these challenges from different but complementary perspectives. First, a wireless Battery Management System based on Near Field Communication (NFC) will be discussed, exploring how wireless interfaces can be exploited to simplify battery monitoring and management while reducing wiring complexity and improving system integration. The seminar will then move to the security of connected automotive systems, focusing on Intrusion Detection Systems for in-vehicle networks and, in particular, on the detection of malicious activity on the Controller Area Network (CAN) bus connecting the Electronic Control Units (ECUs) of modern vehicles.
A second set of topics will address the dependability of computing platforms. The challenges of Reliability, Availability, and Serviceability (RAS) in RISC-V architectures will be introduced, with particular emphasis on error detection, logging, and reporting. In this context, an IP developed to provide RISC-V-compliant error logging and reporting according to the RISC-V RERI standard will be presented, highlighting the role of hardware support in building resilient computing systems.
Finally, the seminar will consider the hardware foundations of security, focusing on the integrated design of True Random Number Generators (TRNGs) in FinFET technology for resource-constrained applications. The discussion will illustrate how device-level characteristics and circuit-level design choices can be leveraged to provide reliable entropy sources under stringent constraints on area, power, and implementation complexity.
Overall, the seminar will highlight how security, dependability, and efficient hardware design are increasingly intertwined in the development of trustworthy embedded and cyber-physical systems, and how these challenges can be addressed through cross-layer hardware and system-level design methodologies.
SHORT BIO
Dr. Daniele Rossi is an Associate Professor of Electronics in the Department of Information Engineering at the University of Pisa, Italy, where he also coordinates the Industrial Internet of Things Laboratory. He has previously held academic and research positions at the University of Hertfordshire, the University of Southampton, and the University of Bologna, as well as a visiting position at Philips Research Laboratories in Eindhoven.
His research interests span the design of reliable, energy-efficient, and secure electronic systems, with particular emphasis on dependable embedded systems and SoCs, Reliability, Availability and Serviceability (RAS), fault-tolerant and testable circuits, and hardware security for embedded and cyber-physical systems. His recent research activities include RAS solutions for RISC-V-based high-performance computing systems, hardware-supported intrusion detection for next-generation vehicles, IoT dependability, and hardware security primitives.
He is a member of RISC-V International and of the RISC-V RAS Error Record register Interface (RERI) Task Group, contributing to the development of the RISC-V standard for error logging and reporting. He has participated in several European research projects on next-generation RISC-V processors and secure and reliable electronic systems, including the European Processor Initiative (EPI) and Digital Autonomy with RISC-V in Europe ( DARE).
Daniele Rossi is a Senior Member of IEEE and has authored more than 150 peer-reviewed journal and conference publications.